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<h1>Links and Selected Readings</h1>


<h2>GCC-specific Literature</h2>

<ul>

  <li><a href="http://www.network-theory.co.uk/gcc/intro/">An Introduction
  to GCC</a> by Brian J. Gough.</li>

  <li><a href="https://en.wikibooks.org/wiki/GNU_C_Compiler_Internals">GNU C Compiler Internals (Wikibook)</a>, numerous contributors.</li>

  <li><a href="https://www.pspace.org/a/thesis/">Compilation
  of Functional Programming Languages using GCC -- Tail Calls</a>
  by Andreas Bauer.</li>
<!--	
  <li><a href="http://ftp.axis.se/pub/users/hp/pgccfd/">Porting GCC for
  Dunces</a> by Hans-Peter Nilsson &lt;<a href="mailto:hans-peter.nilsson@axis.com">hans-peter.nilsson@axis.com</a>&gt;.</li>
-->
  <li><a href="http://cobolforgcc.sourceforge.net/cobol_toc.html">Using,
  Maintaining and Enhancing COBOL for the GNU Compiler Collection (GCC)</a>
  by Joachim Nadler and Tim Josling
  &lt;<a href="mailto:tej@melbpc.org.au">tej@melbpc.org.au</a>&gt;.</li>

  <li><a href="https://itanium-cxx-abi.github.io/cxx-abi/">
  The V3 multi-vendor standard C++ ABI</a> is used in GCC releases 3.0 and
  above.</li>

  <li><a href="http://kegel.com/crosstool/">
  Compiling and testing complete gcc/glibc cross-toolchains for Linux
  targets</a> by Dan Kegel.</li>

</ul>


<h2>Chip Documentation</h2> 

<p>
The list below is based on the subdirectory names of the gcc/config
directory, which typically matches with the CPU name in the
configuration name. In some cases, different (but similar) CPUs are
put into one directory; the names in parentheses list such similar CPU
names.
</p>

<ul>
 <li>AArch64
  <br />The 64-bit execution state of the ARM Architecture, first introduced
  by the ARMv8-A architecture.
  <br />Manufacturer: Various, by license from ARM.
  <br /><a href="https://developer.arm.com/architectures/cpu-architecture">ARM Documentation</a>
 </li>

 <li>andes (nds32)
  <br />Manufacturer: Various licenses of Andes Technology Corporation.
  <br />CPUs include: AndesCore families N7, N8, SN8, N9, N10, N12 and N13.
  <br /><a href="http://www.andestech.com/en/products-solutions/product-documentation/">Andes Documentation</a>
  <br />GDB includes a simulator for all CPUs.
 </li>

 <li>arc
  <br />Manufacturer: Synopsys Inc (as Synopsys DesignWare softcore)
  <br />CPUs include: ARC600, ARC700
  <br /><a href="https://www.synopsys.com/designware-ip/processor-solutions.html">ARC Documentation</a>
 </li>

 <li>ARM
  <br />Manufacturer: Various, by license from ARM.
  <br />CPUs include: ARM7TDMI, and the Cortex-A, Cortex-R and Cortex-M series.
  <br /><a href="https://developer.arm.com/architectures/cpu-architecture">ARM Documentation</a>
  <br /><a href="https://developer.arm.com/documentation/ihi0036/latest/">Application Binary Interface (ABI) for the ARM Architecture</a>
 </li>

 <li>AVR
  <br />Manufacturer: Atmel
 </li>

 <li>Blackfin
  <br />Manufacturer: Analog Devices
  <br /><a href="https://www.analog.com/en/products/processors-microcontrollers/processors-dsp/blackfin-embedded-processors.html">Blackfin Documentation</a>
 </li>

 <li>c4x
   <br />Manufacturer: Texas Instruments
   <br />Exact chip name: TMS320C4X
 </li>

 <li>C6X
   <br />Manufacturer: Texas Instruments
   <br />Exact chip name: TMS320C6X
   <br /><a href="http://linux-c6x.org/">Site for the Linux on C6X project</a>
 </li>

 <li>CR16
   <br />Manufacturer: National Semiconductor
   <br />Acronym stands for: CompactRISC 16-bit 
   <br />GDB includes a simulator
 </li>

 <li>CRIS
   <br />Manufacturer: Axis Communications
   <br />Acronym stands for: Code Reduced Instruction Set
   <br />The CRIS architecture is used in the ETRAX system-on-a-chip series.
   <br /><a href="https://www.axis.com/files/tech_notes/etrax_100lx_prog_man-050519.pdf">Programmer's Manual for CRIS v10</a>
 </li>
 
 <li>C-SKY
   <br />Manufacturer: C-SKY Microsystems
   <br /><a href="https://github.com/c-sky/csky-doc">C-SKY Documentation</a>
 </li>
 
 <li>Epiphany
  <br />Manufacturer: Adapteva
  <br /><a href="https://www.adapteva.com">Manufacturer's website</a> with
  additional information about the Epiphany architecture.
 </li>
 
 <li>fr30
   <br />Manufacturer: Fujitsu
   <br />Acronym stands for: Fujitsu RISC
   <br />GDB includes a <a href="https://sourceware.org/cgen/">CGEN</a>
   generated simulator.
 </li>
 
 <li>h8300
   <br />Manufacturer: Renesas
   <br />Exact chip name: H8/300
   <br />GDB includes a simulator.
   <br /><a href="projects/h8300-abi.html">H8/300
         Application Binary Interface for GCC</a>.
 </li>
 
 <li>i386 (i486, i586, i686, i786)
   <br />Manufacturer: Intel

  <br />Some information about optimizing for x86 processors, links to
  x86 manuals and documentation:

  <br /><a href="https://www.agner.org/optimize/">https://www.agner.org/optimize/</a>
  <br /><a href="https://www.sandpile.org">www.sandpile.org</a>:
  Christian Ludloff's technical x86 processor information.
 </li>
 
  <li>i860
  <br />Manufacturer: Intel
  </li>
 
 <li>m32c
  <br />Manufacturer: Renesas
  <br /><a href="https://www.renesas.com/us/en/products/microcontrollers-microprocessors/other-mcus-mpus/m16c-family-mcus-r32c-m32c-m16c">Renesas M16C Family (R32C/M32C/M16C) Site</a>
  <br />GDB includes a simulator.
 </li>
 
 <li>m32r
  <br />Manufacturer: Renesas
  <br />GDB includes a CGEN generated simulator.
 </li>
 
 <li>m68hc11 (m68hc12)
  <br />Manufacturer: Motorola
  <br />GDB includes a 68HC11 and a 68HC12 simulator.
 </li>
 
 <li>m68k
  <br />Manufacturer: Motorola
 </li>
 
 <li>mcore
  <br />Manufacturer: Motorola
  <br />GDB includes a simulator.
 </li>

 <li>MeP
   <br />Manufacturer: Toshiba
   <br />SID includes a MeP simulator.
 </li>

 <li>MicroBlace
   <br />Manufacturer: Xilinx
   <br /><a href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx11/mb_ref_guide.pdf">
         MicroBlaze Processor Reference Guide</a>
   <br />GDB includes a simulator for an earlier version of the processor.
 </li>

 <li>mips (mipsel, mips64, mips64el)
  <br />The *el variants are little-endian configurations.
 </li>
 
 <li>MMIX
   <br />Manufacturer: none.  There is a simulator, see links below.
   <br />Acronym stands for: Roman numeral for 2009, pronounced
   [EM-micks].  The number stands for the average of numbers of "14
   actual computers very similar to MMIX".  The name may also be due to a
   predecessor appropriately named MIX.
   <br />MMIX is used in program examples in Donald E. Knuth's
   <a href="https://www-cs-faculty.stanford.edu/~knuth/taocp.html">The Art
   of Computer Programming</a> (ISBN 0-201-89683-4).
   <br />The <a
   href="https://www-cs-faculty.stanford.edu/~knuth/mmix.html">MMIX
   page</a> has more information about MMIX.  Knuth also wrote a
   <a href="https://www-cs-faculty.stanford.edu/~knuth/mmixware.html">book
   specifically about MMIX</a> (MMIXware, ISBN 3-540-66938-8).
 </li>
 
 <li>mn10300
  <br />Manufacturer: Matsushita
  <br />Alternate chip name: AM30
  <br />GDB includes a simulator.
 </li>

 <li>msp430
  <br />Manufacturer: Texas Instruments
  <br />GDB includes a simulator.
 </li>
 
 <li>Nios II
  <br />Manufacturer: Intel (formerly Altera)
  <br /><a href="https://www.intel.com/content/www/us/en/programmable/products/processors/support.html">Nios II Processor Documentation</a>
 </li>

 <li>OpenRISC
  <br />Manufacturer: Many (community built architecture)
  <br /><a href="https://openrisc.io">OpenRISC Project</a>
  <br /><a href="https://openrisc.io/architecture">Architecture Specification</a>
 </li>

 <li>pa
  <br />Manufacturer: HP
  <br />PA-RISC is preferred over the older HPPA acronym
  (Hewlett-Packard Precision Architecture).
  <br /><a href="https://parisc.wiki.kernel.org/index.php/Main_Page">parisc.wiki.kernel.org</a>
  is another good source of PA-RISC documention.
 </li>

 <li>pdp11
  <br />Manufacturer: DEC
  <br /><a href="http://simh.trailing-edge.com/">Simulators</a>
 </li>

 <li>pru
   <br />Manufacturer: Texas Instruments
   <br /><a href="https://www.ti.com/lit/ug/spruij2/spruij2.pdf">PRU Assembly Instruction User Guide.</a>
   <br /><a href="https://www.ti.com/lit/ug/spruhv7c/spruhv7c.pdf">TI ABI Specification (see chapter 6).</a>
   <br /><a href="https://elinux.org/Category:PRU">Community PRU Documentation</a>
 </li>

 <li>riscv
  <br />Manufacturer: Many (open ISA standard)
  <br /><a href="https://riscv.org">RISC-V Foundation</a>
  <br /><a href="https://riscv.org/technical/specifications/">ISA Specifications</a>
 </li>
 
 <li>rs6000 (powerpc, powerpcle)
  <br />Manufacturer: IBM, Motorola
  <br /><a href="https://www.ibm.com/systems/power/openpower/">Power ISA</a>
  <br /><a href="https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture">64-Bit ELF V2 ABI - OpenPOWER ABI</a>
  <br /><a href="http://publib16.boulder.ibm.com/pseries/en_US/infocenter/base/43_docs/aixassem/alangref/toc.htm">AIX V4.3 Assembler Language Ref.</a>
  <br /><a href="http://publibn.boulder.ibm.com/doc_link/en_US/a_doc_lib/aixassem/alangref/alangreftfrm.htm">AIX 5L Assembler Language Ref.</a>
 </li>
 
 <li>rx
  <br />Manufacturer: Renesas
  <br /><a href="https://www.renesas.com/us/en/products/microcontrollers-microprocessors/m16c.html">RX610 landing page</a>
 </li>
 
 <li>sh
  <br />Manufacturer: Renesas, various licensees.
  <br />CPUs include: SH1, SH2, SH2-DSP, SH3, SH3-DSP, SH4, SH4A, SH5 series.
  <br /><a href="https://www.renesas.com/us/en/products/microcontrollers-microprocessors/other-mcus-mpus/superh-risc-engine-family-mcus">Renesas SuperH Processors</a>
  <br /><a href="http://shared-ptr.com/sh_insns.html">SuperH Instruction Set Summary</a>
  <br />GDB includes a simulator.
 </li>
 
 <li>sparc (sparclite, sparc64)
  <br />Manufacturer: Sun
  <br />Acronym stands for: Scalable Processor ARChitecture
 </li>
 
 <li>tilegx, tilepro
  <br />Manufacturer: Mellanox
 </li>
 
 <li>v850
  <br />Manufacturer: NEC
 </li>
 
 <li>vax
  <br />Manufacturer: DEC
 </li>
 
 <li>xtensa
  <br />Manufacturer: Tensilica
 </li>

 <li>z/Architecture (S/390)
  <br />Manufacturer: IBM
  <br /><a href="http://publibfp.dhe.ibm.com/epubs/pdf/a227832c.pdf">z/Architecture Principles of Operation</a>
  <br /><a href="http://publibfp.dhe.ibm.com/epubs/pdf/dz9ar008.pdf">ESA/390 Principles of Operation</a>
  <br /><a href="https://refspecs.linuxbase.org/ELF/zSeries/lzsabi0_zSeries.html">Linux for z Systems ABI</a>
  <br /><a href="https://refspecs.linuxbase.org/ELF/zSeries/lzsabi0_s390.html">Linux for S/390 ABI</a>
 </li>

</ul>


<h2>Collected Papers/Sites on Standards, Compilers, Optimization, Etc.</h2>

<h3>C information</h3>

<ul>

  <li>C standards information:

  <ul>

    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/">WG14 (C
    standards committee)</a></li>

    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/n897.pdf">Draft
    C99 Rationale</a></li>

    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/summary.htm">C99
    Defect Reports</a></li>

    <li><a href="http://www.lysator.liu.se/c/rat/title.html">C89
    Rationale (HTML)</a></li>

    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/tc1.htm">C89
    Technical Corrigendum 1</a></li>

    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/tc2.htm">C89
    Technical Corrigendum 2</a></li>

    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/dr.htm">C89
    Defect Reports</a></li>

  </ul></li>

  <li>Sequence point rules in C:
  <ul>
    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/n925.htm">
    A formal model of sequence points and related issues by
    Clive Feather</a></li>
    <li><a href="https://www.cl.cam.ac.uk/techreports/UCAM-CL-TR-453.pdf">
    C formalised in HOL, thesis by Michael Norrish</a></li>
    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/n926.htm">
    Sequence points analysis by Raymond Mak</a></li>
    <li><a href="http://www.open-std.org/jtc1/sc22/wg14/www/docs/n927.htm">
    Another formalism for sequence points by D. Hugh Redelmeier</a></li>
  </ul></li>

  <li>C historical information:
  <ul>
    <li><a href="https://www.bell-labs.com/usr/dmr/www/chist.html">The
    Development of the C Language</a>, by Dennis M. Ritchie (also in
    <a href="https://www.bell-labs.com/usr/dmr/www/chist.pdf">PDF</a>).</li>
  </ul></li>

</ul>



<h3>C++ information</h3>

<ul>
  <li><a href="http://www.open-std.org/jtc1/sc22/wg21/">ISO Committee homepage
      (defects list, etc)</a></li>
</ul>

<ul>
  <li><a href="http://www.stlport.org/">STLport homepage</a></li>
</ul>

<ul>
  <li><a href="https://math.nist.gov/tnt/">Template Numeric Toolkit</a></li>
  <li><a href="https://www.boost.org">The Boost C++ Libraries</a></li>
</ul>

<ul>
  <li><a href="http://www.robertnz.net/cpp_site.html">Internet sites for
      C++ users</a></li>
</ul>

<ul>
  <li><a href="http://www.cantrip.org/cpp.html">Nathan Myers' locale page</a></li>
  <li><a href="http://www.josuttis.com/libbook/">Nicolai Josuttis' Standard
      Library book</a></li>
</ul>



<h3 id="fortran">Fortran information</h3>

<ul>

  <li>Fortran standards information:

  <ul>

    <li><a href="https://j3-fortran.org">Fortran standards committee</a>
    (includes references to the current draft of the Fortran standard)</li>

    <li><a href="https://wg5-fortran.org/ARCHIVE/Fortran77.html">FORTRAN 77 Standard</a></li>

  </ul></li>

  <li>Testing and Validation -
      Some packages aimed at Fortran compiler validation.
    <ul>
      <li>
        <a href="https://www.itl.nist.gov/div897/ctg/fortran_form.htm">FORTRAN
        77 test suite</a> by the NIST Information Technology Laboratory
        (<a href="https://www.itl.nist.gov/div897/ctg/software.htm">license</a>)
        contains legal and operational Fortran 77 code.
      </li>
      <li>
        The g77 testsuite (which is part of GCC).
      </li>
      <li>
        Test suite of
        <a href="https://www.dsm.fordham.edu/~ftnchek/">ftnchek</a>,
        included in its distribution. It contains some illegal code and
        therefore makes it possible to stress the compiler error handling.
      </li>
      <li>
        <a href="http://flibs.sourceforge.net"><cite>Checking
        properties of the compiler and the run-time environment</cite></a> by
        Arjen Markus (source provided).
      </li>
      <li>
        <a href="http://gdbf95.sourceforge.net/">gdbf95</a> testsuite.
      </li>
      <li>
        Tests of run-time checking capabilities
        <ul>
          <li>
            <a href="https://polyhedron.com">Polyhedron tests</a>
          </li>
        </ul>
      </li>
    </ul>
   </li>

   <li>Other resources: 
      <ul>
        <li>
          <a href="http://www.fortran-2000.com/MichelList/">
          Michel Olagnon's Fortran 90 List</a> contains a "Tests and
          Benchmarks" section mentioning commercial testsuites.
        </li>
        <li>
          <a href="http://www.personal.psu.edu/faculty/h/d/hdk/fortran.html">Herman
          D. Knoble's Fortran Resources</a> contain some sections on compiler
          validation and benchmarking.
        </li>
        <li>
          <cite>Complying with Fortran 90, How does the current crop of
          Fortran 90 compilers measure up to the standard?</cite>, Steven
          Baker, Dr Dobb's, January 1995. It described the results of several
          commercial testsuites.
        </li>
      </ul>
   </li>

   <li>Historical material - for your enjoyment.
   <ul>
     <li><a href="https://www.cs.utexas.edu/users/EWD/">The writings of Edsger W. Dijkstra (RIP)</a></li>
   </ul>
   </li>

</ul>



<h3>Ada information</h3>

<ul>

 <li>Ada standards information:
 <ul>
   <li><a href="http://www.open-std.org/jtc1/sc22/wg9/">WG9 (Ada
   standards committee):</a>
   <ul>
     <li><a href="http://www.ada-auth.org/ais.html">Ada Issues</a></li>
   </ul></li>
   <li><a href="https://www.adaic.org/ada-resources/standards/">List of
     Ada standards (Ada Information Clearinghouse):</a>
   <ul>
     <li><a href="https://www.adaic.org/resources/add_content/standards/05aarm/html/AA-TTL.html">Annotated
       Ada&nbsp;2005 Reference Manual</a></li>
     <li><a href="https://www.adaic.org/resources/add_content/standards/05rm/html/RM-TTL.html">Ada&nbsp;2005
       Reference Manual</a></li>
     <li><a href="https://www.adaic.org/resources/add_content/standards/05rat/html/Rat-TTL.html">Ada&nbsp;2005
       Rationale</a></li>
     <li><a href="https://www.adaic.org/resources/add_content/standards/95aarm/AARM_HTML/AA-TTL.html">
     Annotated Ada&nbsp;95 Reference Manual</a></li>
     <li><a href="https://www.adaic.org/resources/add_content/standards/95lrm/ARM_HTML/RM-TTL.html">
     Ada&nbsp;95 Reference Manual</a></li>
     <li><a href="https://www.adaic.org/resources/add_content/standards/95rat/rat95html/rat95-contents.html">
     Ada&nbsp;95 Rationale</a></li>
     <li><a href="http://archive.adaic.com/standards/83lrm/html/ada_lrm.html">
     Ada&nbsp;83 Reference Manual</a></li>
     <li><a href="http://archive.adaic.com/standards/83rat/html/Welcome.html">
     Ada&nbsp;83 Rationale</a></li>
   </ul></li>
 </ul></li>

 <li>Related standards:
 <ul>
   <li><a href="http://www.sigada.org/WG/asiswg/">Ada Semantic Interface
   Specification (ASIS)</a></li>
 </ul></li>

 <li>Compiler validation:
 <ul>
   <li><a href="http://www.ada-auth.org/acats.html">Ada Conformity Assessment
     Test Suite (ACATS)</a></li>
 </ul></li>

 <li>Other resources:
 <ul>
   <li><a href="https://www.adacore.com/community">AdaCore Community Site</a></li>
   <li><a href="https://www.adacore.com/books/gnat-the-gnu-ada-compiler">GNAT:
   The GNU Ada Compiler</a></li>
   <li><a href="https://www.adaic.org/resources/add_content/docs/95style/html/cover.html">Ada
   Quality &amp; Style Guide</a></li>
   <li><a href="http://www.sigada.org/ada_letters/jun2004/ravenscar_article.pdf">Guide
   for the use of the Ada Ravenscar Profile in high integrity
   systems</a></li>
 </ul></li>

</ul>


<h3>Go information</h3>

<ul>
<li><a href="https://golang.org/">General Go information</a></li>
<li><a href="https://golang.org/ref/spec">Go language
    specification</a></li>
</ul>


<h3>D information</h3>

<ul>
  <li><a href="https://dlang.org">D language homepage</a></li>
  <li><a href="https://dlang.org/spec/spec.html">D language reference</a></li>
</ul>


<h3>Modula 3 information</h3>

<ul>
  <li><a href="http://www.modula3.org">http://www.modula3.org</a></li>
</ul>



<h3>Miscellaneous information</h3>

<ul>

  <li><a href="https://www.validlab.com/goldberg/paper.pdf">What Every
  Computer Scientist Should Know about Floating-Point Arithmetic</a>
  by David Goldberg, including Doug Priest's supplement (PDF format)</li>

  <li><a href="https://www.validlab.com/goldberg/addendum.html">Differences
  Among IEEE 754 Implementations</a>
  by Doug Priest (included in the PostScript-format document above)</li>

  <li><a href="https://en.wikipedia.org/wiki/IEEE_754r">IEEE 754r</a>, an
  ongoing revision to the IEEE 754 floating point standard.</li>

  <li><a href="https://www.research.ibm.com/journal/">IBM Journal of Research and Development</a></li>

  <li><a href="http://refspecs.linux-foundation.org/elf/elfspec_ppc.pdf">System
  V PowerPC ABI</a></li>

  <li><a href="https://dwarfstd.org">DWARF Workgroup</a></li>

</ul><ul>

  <li><a href="http://compilerconnection.com">Links related to many
  compiler topics</a></li>

  <li><a href="https://compilers.iecc.com">comp.compilers archive</a></li>

  <li>Steven Muchnick (1997) "Advanced Compiler Design and Implementation".
  880pp.  ISBN: 1-55860-320-4.</li>

  <li>Robert Morgan (1998) "Building an Optimizing Compiler".
  300pp. ISBN: 1-55558-179-X.</li>

  <li><a href="https://www.opengroup.org/">The Open Group</a> has quite a bit
  on <a href="https://pubs.opengroup.org/onlinepubs/009695399/toc.htm">POSIX
  and friends</a>.</li>
                                                          
  <li><a href="http://www.unicode.org">Unicode</a> and <a
  href="http://www.unicode.org/reports/tr15/">Unicode Normalization
  Forms</a>.</li>

</ul>


<h2>Chip Documentation of Obsolete Ports</h2> 

<p>
Below is the list of ports that GCC used to support.
</p>

<ul>
  <li>1750a
  <br />Exact chip name: MIL-STD-1750A processor
  <br />Manufacturers: various
  <br /><a href="http://legacy.cleanscape.net/stdprod/xtc1750a/resources/mil-std-1750.zip">Specification</a>
  </li>

  <li>a29k
  <br />Manufacturer: AMD
  </li>

  <li>clipper
  <br />Manufacturer: Intergraph
  <br />Exact machine name: CLIPPER
  </li>

  <li>convex (c1, c2, c3[248])
  <br />Manufacturer: Convex (HP)
  </li>

  <li>d30v
  <br />Manufacturer: Mitsubishi
  <br />There is no longer any reference to this chip anywhere on the 
      manufacturer's web site; it may be dead.
  <br />GDB includes a simulator.
  </li>
 
  <li>dsp16xx
  <br />Manufacturer: AT&amp;T
  </li>
 
  <li>m88k
  <br />Manufacturer: Motorola
  </li>
 
  <li>mn10200
  <br />Manufacturer: Matsushita
  <br />GDB includes a simulator.
  </li>
 
  <li>pj (picoJava)
  <br />Manufacturer: Sun
  </li>

  <li>romp
  <br />Manufacturer: IBM
  <br />Acronym stands for: Research/Office Products MicroProcessor
  <br />The ROMP was the processor inside the IBM PC/RT.
  </li>
 
</ul>
 
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